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Series in Microelectronics
edited by Wolfgang Fichtner
George S. Moschytz
Broadband Sigma-Delta A/D Converters
2004; 194 pages. € 64,00. ISBN 3-89649-921-1
Topic of this dissertation is the design and the implementation of broadband sigma-delta (SD) A/D converters. In this context, an extensive architecture surrvey of existing circuits is carried out. The problem of the finite linearity of multibit feedback DACs is addressed, as well. The design and implementation of two SD modulators is then described. The first design is a fifth order SD modulator for ADSL; it employs a 1.5bit quantizer and has an oversampling ratio (OSR) of 32. The circuit is integrated in a 0.25um digital CMOS technology and achieves a peak signal-to-noise ratio (SNR) of 85dB in a band of 1MHz. The power consumption is as low as 24mW. The second design is a fifth order SD modulator for VDSL. It employs a 4bit quantizer and has an OSR of 8. The circuit is implemented in a digital 0.18um CMOS technology and achieves a peak SNR of 82dB. The conversion bandwidth is as high as 11MHz; the power consumption is 203mW.
About the author
Pio Balmelli was born in Melide, Switzerland, on July 12, 1973. He received the degree in Electrical Engineering from the Swiss Federal Institute of Technology (ETH), Zurich in 1998. In the same year he joined the Integrated Systems Laboratory of ETH Zurich, where he worked as a research and teaching assistant in the analog group.
A/D Converter, Sigma-Delta Modulation, Analog, IC Design, CMOS, ADSL, VDSL, Switched-Capacitor, Oversampling
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