Series in Microelectronics
George S. Moschytz
Pier Andrea Francese
D / A Converters in CMOS
2006; 248 pages. € 64,00. ISBN 3-86628-055-6
This dissertation presents specific studies on the design of D/A converters finalized towards the implementation of two different design examples in 0.18μm CMOS technology.
Calibration is used truly in background in the first design example to overcome the limited accuracy of the current sources in a current-steering D/A converter. The converter achieves a static linearity of 14bits and thanks to a return-to-zero pulse format is also capable of delivering spectrally pure signals at high frequency.
The second design example presents an innovative architecture that do not rely on stringent component matching to reconstruct linearly an oversampled signal from a ∑∆ (sigma-delta) modulator. A 16 times oversampled signal from a 4th-order multi-bit cascaded ∑∆ (sigma-delta) digital modulator is reconstructed with a filter composed by a semidigital/digital transversal filter and a recursive filter in switched-capacitor (SC) technique. With a SNR of 78 dB, a SFDR ranging from 73 dB to 80 dB within a 1.104 MHz signal band and a MTPR greater than 70 dB at 15 dB PAR the proposed system is suitable for broadband applications.
Keywords: data converters, D/A converters, CMOS, analog circuits, jitter
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