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Series in Microelectronics Vol. 171
edited by Wolfgang Fichtner
Qiuting Huang
Heinz Jäckel
Hans Melchior
George S. Moschytz
Gerhard Tröster
Christian Kromer
10 Gb/s to 40 Gb/s Receiver
for
High-Density Optical Interconnects
in 80-nm CMOS.
2006; 270
pages. €
64,00. ISBN 3-86628-069-6
This book presents
several circuits for 10 Gb/s to 40 Gb/s low power, high-density optical
interconnect applications implemented in a standard digital 80-nm CMOS process.
With a 4×10 Gb/s optical transceiver array, consuming 2.5 mW/(Gb/s)
only, it was demonstrated that the required aggregate bandwidth of several Tb/s
in near future and the limited system power budget in high-density chip-to-chip
interconnects can be met. A 40 Gb/s optical receiver
explores the possibilities in terms of high speed and low power consumption of
today’s CMOS technology. In order to achieve these high data rates of the
optical receivers, a novel transimpedance amplifier
(TIA) topology is introduced and compact peaking inductors were used. A
first-order bang-bang clock-and-data recovery (CDR) circuit presents a high
data rate of 25 Gb/s and a new topology suited for
high-density, pseudo-synchronous electrical and optical interconnects. In
addition, a detailed system analysis for an optical link is given and
electrical specifications for the receiver designs are derived. Further, CMOS
NFET transistors are characterized for DC, AC and noise performance, and many
new circuit ideas and topologies are proposed.
About the
Author
Christian Kromer was born in 1970 in Zurich, Switzerland. He received
the M.S. degree in electrical engineering from the Swiss Federal Institute of
Technology in Zurich (ETH) in 1996. He joined LSI Logic Corporation, in
Milpitas, CA, in 1997, where he was engaged in printed circuit board design for
a quadrature phase shift key (QPSK) receiver system, integrated circuit (IC)
design for an 8-PSK demodulator, and discrete radio frequency (RF) circuit
design. In 2001, he started the Ph.D. program at the Swiss Federal Institute of
Technology in Zurich (ETH), in collaboration with the IBM Zurich Research
Laboratory in Rüschlikon. The Ph.D. thesis has been
successfully submitted to the ETH in 2005.
His research
interests are high-density optical interconnects and complementary metal-oxide
semiconductors (CMOS) analog RF circuit design. He
served as a reviewer for several IEEE journals, e.g. the TMTT, TCAS and MWCL.
Keywords: Receiver,
transceiver, transceiver array, transmitter, optical, optical receiver, high-density,
interconnect, array, IO, I/O, I-O, link, data communication, 10 Gb/s, 10 Gbps, 10 GHz, 20 Gb/s, 20 Gbps,
20 GHz, 25 Gb/s, 25 Gbps, 25 GHz, 40 Gb/s, 40 Gbps, 40 GHz, transimpedance
amplifier, TIA, limiting amplifier, LA, buffer, output buffer, broadband
amplifier, feedback, feedback amplifier, shunt-feedback, feed-forward,
common-gate, regulated cascode, small-signal, transimpedance, operational transconductance
amplifier, OTA, DC-offset, compensation, common-mode feedback, CMFB,
Clock-and-data recovery, CDR, static frequency divider, dynamic frequency
divider, phase interpolator, clock buffer, half-rate phase detector, analog filter, digital loop filter, D-flip-flop, DFF,
gilbert-cell, T-flip-flop, TFF, xor, XOR, exor, EXOR, jitter, jitter tolerance, jitter transfer,
jitter generation, total jitter, random jitter, deterministic jitter,
synchronization, multiplexer, de-multiplexer, bang-bang, thermometer, coding,
counter, Photo diode, photo receiver, PIN, photo current, responsivity,
vertical-cavity surface-emitting laser, VCSEL, multi-mode fibre, MMF,
single-mode fibre, SMF, optical link performance, power penalty, multi-level,
eye-diagram, bit-error-rate, BER, signal-to-noise-ratio, input-referred noise
current, SNR, power budget, sensitivity, receiver sensitivity, optical receiver
sensitivity, pseudo-random bit-sequence, PRBS, CMOS, short-channel,
short-channel CMOS, van der Ziel, van der Ziel noise model, channel noise, induced gate noise, NMOS,
PMOS, poly resistor, shunt peaking, series peaking, series and shunt peaking,
peaking inductors, source degeneration, Printed circuit board, PCB, substrate.
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