Series in Microelectronics
edited by
Wolfgang Fichtner
Qiuting Huang
Heinz Jäckel
Gerhard Tröster
Bernd Witzigmann
Gion Sialm,
VCSEL Modeling and CMOS Trans-
mitters up to 40 Gb/s for High-Density Optical Links.
2007, VIII, 298 pages. € 64,00. ISBN 3-86628-143-9
This book presents several VCSEL models and low power circuits for a
data rate up to 40 Gb/s in high-density optical interconnect applications. Accurate
VCSEL models with a short parameter and computation time of only a few seconds
for the simulation of a 20 ns optical output signal were evaluated and further
developed. Moreover, the VCSEL-to-fiber coupling was investigated with a 2-D
spatiotemporal VCSEL model. The results showed that not only the static but
also the dynamic changes of the output signal of a VCSEL have to be accounted
for in the link analysis.
The circuits were implemented in standard bulk and silicon on insulator
(SOI) digital CMOS processes. With a 4×10 Gb/s optical transceiver array,
consuming 2.5 mW/(Gb/s) only, it was demonstrated that the required aggregate
bandwidth of several Tb/s in near future and the limited system power budget in
high-density chip-to-chip interconnects can be met. A 40 Gb/s optical driver
explores the possibilities in terms of high speed and low power consumption of
today’s CMOS technology. Further, CMOS NFET transistors are characterized for
DC and AC performance, and many inovative circuit ideas and topologies are
proposed.
About the Author
Gion Sialm was born in 1971
in Disentis, Switzerland. He received the M.S. degree in electrical engineering
from the Swiss Federal Institute of Technology in Zurich (ETH) in 1995. He
joined different worldwide acting companies where he was responsible for the
IT. In 2001, he started the Ph.D. program at the Swiss Federal Institute of
Technology in Zurich (ETH), in collaboration with the IBM Zurich Research
Laboratory in Rüschlikon. The PhD thesis has been successfully submitted to the
ETH in 2006.
His research interests are high-density optical interconnects and
complementary metal-oxide semiconductors (CMOS) analog RF circuit design. He
served as a reviewer for several IEEE journals, e.g. the TMTT, TCAS and MWCL.
Keywords: VCSEL models, low
power circuits,data rate up to 40 Gb/s, high-density optical interconnect
applications, VCSEL-to-fiber coupling, high-density chip-to-chip interconnects,
CMOS NFET transistors
Direkt bestellen bei / to order directly from: Hartung.Gorre@t-online.de