Series in Microelectronics
Low-Power Techniques for Low-Frequency VLSI Applications.
2007, 162 pages. € 64,00. ISBN 3-86628-161-7
Power dissipation has become the foremost issue
in VLSI circuits. This work is, therefore, dedicated to the introduction of
novel low-power techniques, specifically in the framework of low-frequency
portable applications. Three main aspects of VLSI design from register-transfer
down to transistor-level are investigated. The first part of this work is
devoted to lining up a new accurate flow to estimate the power consumption in
VLSI circuits. In the second part, novel low-power techniques for multipliers,
which are among the most energy-hungry combinational blocks, are introduced.
The third part proposes the first complete VLSI design flow with resonant
clocking, i.e. a strategy, in which the capacitance associated with the clock
network resonates with an (off-chip) inductor.
About the Author:
Flavio Carbognani was born in Parma (Italy) in 1977. He studied Telecommunication Engineering at the University of Parma. In 2002 he received his Master Degree, discussing a thesis about lifetime prediction models of power semiconductor devices, prepared at the ETH of Zurich, Switzerland. He joined the Integrated Systems Laboratory (IIS) at the ETH as a research assistant in 2002. His primary research interest is the low power design, focused on low-frequency applications, in particular hearing aids.
Keywords: Glitch, Hearing Aids, Leakage, Low Power, Multiplier, Resonant Clocking, Transmission Gate, VLSI
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