Inh.: Dr. Renate Gorre
Fon: +49 (0)7533 97227
Fax: +49 (0)7533 97228
Series in Microelectronics
edited by Wolfgang Fichtner
of Nonvolatile Memories
2010. X, 130 pages. € 64,00.
The actual size of flash cell transistors is one of the smallest devices in mass production where 3D effects are prominent. This thesis proposes a methodology to achieve realistic simulations of floating-gate devices, based on demonstrating the capabilities of TCAD to handle the investigation of similar types of device. The methodology covers the structure generation, the meshing and the typical electrical simulations of the device. One of the advantages of using TCAD simulations is the capability to investigate and extract the capacitances and the coupling coefficients. The operation of the flash cell is examined based on one isolated cell in 2D and 3D. Afterwards, the methodology is used to investigate the interactions of the cells of a block under any operation condition. In addition, a full row of 32 transistors that represents a NAND row is simulated in the read operation. This method is suitable to investigate nonvolatile memories and can be generalized to any MOS technology.
Keywords: flash cell transistors, floating-gate devices, TCAD, structure generation, meshing, NAND row, nonvolatile memories, MOS technology.
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Hartung-Gorre Verlag / D-78465 Konstanz / Germany