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Series in
Microelectronics
edited by
Qiuting
Huang
Andreas
Schenk
Mathieu
Maurice Luisier
Bernd
Witzigmann
Stefan Mach
Floating-Point Architectures for
Energy-Efficient Transprecision Computing
2021. XIV, 200 pages. ISBN 978-3-86628-719-8
Abstract:
The power-wall obstacle fuels a push towards computing
paradigms that put energy efficiency as the ultimate figure of merit for any
hardware design.
Significant advances in research have relaxed the
"always maximum precision" approach to standard floating-point usage
and exploit approximation more aggressively.
The emerging "transprecision
computing" paradigm requires fine-grained control over numerical precision
to tease out more performance and efficiency from hardware and software.
This work develops the concept of flexible transprecision computing for general-purpose systems by following
a multi-pronged approach.
It explores extensions to the FP type system, the
addition of new types and operations to compilation toolchains, processor ISAs,
and processor cores while also developing the necessary hardware for a fully
configurable transprecision floating-point unit.
These developments spawn a range of implementations
spanning both the low-power embedded and application-class high-performance
domains, delivering improvements in performance and energy efficiency across
the board.
Vita:
Stefan Mach was born on 26th September 1990 in
Lucerne, Switzerland.
He received his BSc degree from ETH Zurich in 2014 and
his MSc degree from ETH Zurich in 2016.
He joined the Integrated Systems Laboratory of ETH
Zurich as a Ph.D. candidate in 2016 under Prof. Dr. Luca Benini's
supervision.
His research interests include transprecision
computing, computer arithmetics, and energy-efficient
processor architectures.
Keywords:
floating-point, transprecision, energy-efficient, RISC-V,
floating-point unit, embedded, high-performance, ASIC
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