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Series in Signal and Information Processing, Vol. 16
edited by Hans-Andrea Loeliger
Matthias Frey
On Analog Decoders and Digitally Corrected Converters.
1. Auflage/1st edition 2006, XVI,
180 Seiten/pages, € 64,00. ISBN
3-86628-074-2
In recent years, the demand for efficient and reliable communication networks has greatly increased. To
satisfy this need, powerful error correcting
codes were introduced. The (iterative) algorithms used for decoding such modern codes are computationally very demanding
and need great computing power to deliver real-time results. Mobile
users, however, demand low-power electronics; the combination of both demands
led to an increased interest in analog communication
circuits, e.g., in analog decoders for error correcting codes.
An analog decoder can be understood as a
code-representing (factor) graph mapped on analog silicon, whereas the decoding algorithm (e.g., the
sum-product algorithm) corresponds to the settling behavior
of the analog circuit. The performance gain of analog decoders compared to digital
implementations in terms of speed or power-consumption is believed
to be at least a factor of 100.
The first part of this thesis discusses various implementations of such analog decoders:
Hamming decoders built out of two generations of discrete softgates, an integrated Hamming decoder and an integrated
Reed Muller decoder are presented. An extensive collection of measured
error-rate curves of all decoders under various operating conditions prove
their full functionality and demonstrate their behavior under transistor mismatch.
Furthermore, a novel circuit to compute the soft symbols for a PAM or QAM signal is presented. This simple transistor
network blends in nicely with analog decoders—its outputs are currents proportional to
the symbol- likelihoods.
Digital data processing is pervasive, and the need for fast, high resolution
and low-power analog-to-digital and digital-to-analog
converters persistent. Highly accurate converters usually require
large element to achieve the desired minimal mismatch; large elements however demand high currents for high speed. This
trade-off can be circumvented by using small-sized, yet imprecise, elements and
then adding digital post- correction circuitry.
The second part of the thesis is devoted to converters with minimal sized
elements. It can be shown, that the effective resolution of a
digitally-corrected analog-to-digital converter only
weakly depends on the comparator mismatch. This was confirmed by measurements
on an integrated flash analog-to-digital converter
containing 256 low- precision comparators and achieving an effective resolution
of nearly 7 bits. A similar statement holds for current-steering digital-to-analog converters with almost minimal-sized current
sources: for a converter containing 12 low-precision current sources and
digital post-correction, a effective resolution of more than 10 bits was
achieved—virtually irrespective of the mismatch.
Keywords: Factor graphs,
message-passing algorithms, sum-product algorithm, analog
non-linear transistor circuits, translinear circuits,
soft symbol detection, digital data transmission, analog-to-digital
converter, digital-to-analog converter, imprecise
elements.
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