Series in Signal and Information Processing, Vol. 21
edited by Hans-Andrea Loeliger

Murti V.R.S. Devarakonda,

 

Joint Matched Filtering, Decoding, and Timing Synchronization

 

1. Auflage/1st edition 2012, XVI, 156 Seiten/pages, 64,00.
ISBN 3-86628-415-4, 978-3-86628-417-3

 

This thesis is motivated by the success of analog decoder implementations
using message passing algorithms and explores ideas for all-analog receiver architectures. Current analog implementations are limited mainly to the decoder because receivers require a majority of tasks, such as matched filtering, symbol synchronization, and equalization, performed in the digital domain. A discrete-time interface is required between an analog decoder and the rest of the receiver, necessitating elaborate control circuitry to be developed.
In the current thesis, we aim to develop a system that combines detection, decoding, and symbol synchronization into one. Our focus is on choice of algorithms that can be implemented in the form of a ``clockless'' circuit. In particular, we study whether it is feasible to push symbol synchronization to the end of the receiver processing chain and eliminate discrete-time interfaces throughout.
To achieve this, we first develop message passing algorithms for detecting pulses, and show that a matched for a pulse can be implemented by forward-only message passing on a Forney-style factor graph. We introduce the notion of a glue factor and show how likelihoods for various hypotheses involving state space models can be computed.
Second, we introduce the notion of an input-tracking decoder. We make use of a few concepts from dynamical systems to derive a decoder for a binary code that works with continuously varying inputs and produces continuously decoded outputs.
We combine these two ideas in the end to discuss two receivers, each of which performs joint detection, decoding, and symbol synchronization.
In one receiver, the discrete-time interface between demodulator and decoder is eliminated and in another, it was shown that near-optimum timing synchronization can be obtained with the forward processing approach. The ideas proposed and the two receiver architectures differ in many ways from conventional solutions. The thesis is concluded with suggestions on variant architectures and further work that is required to explore algorithms on similar lines.

 

Keywords: Demodulation; Detection; Input-tracking decoding; Timing synchronization; Factor graphs; Graphical models; Message passing; Analog receivers.


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